The present disclosure generally relates to a semiconductor structure, and particularly to a fin field effect transistor having at least one semiconductor fin having a sublithographic width and formed by solid phase epitaxy, and methods of manufacturing the same.
Fin field effect transistors (finFETs) employ a semiconductor fin having substantially vertical sidewalls. Because channels can be formed underneath the substantially vertical sidewalls of a finFET, a finFET can provide a higher on-current per unit device area compared with conventional planar semiconductor devices.
One of the difficulties of conventional finFETs is that the width of a semiconductor fin is limited by minimum lithographic dimensions that can be printed on a photoresist layer. Further, the aspect ratio of the semiconductor fins is limited due to limited selectivity of the etch process employed to form the semiconductor fins and the need to prevent a pattern collapse in a patterned photoresist layer. The etch process that is employed to transfer the pattern in the photoresist layer into a semiconductor layer to form semiconductor fins also tends to introduce line edge roughness (LER) during the pattern transfer. In many cases, a dielectric fin cap portion, such as a silicon nitride fin cap portion, adds to the parasitic capacitance of the semiconductor fin and degrades fin FET performance. The combination of these factors limits the pattern density in conventional semiconductor devices employing finFETs.